# HG changeset patch
# User Petri Hintukainen <phintuka@users.sourceforge.net>
# Date 1177678101 -10800
# Node ID a36c1bebf8fdee91e75ed07cbd4e2d33554c660b
# Parent  2ff5e6c512d9ece93471cb29ece716dad42cb166
# Parent  83b7b1eb092581a029d7e7bdc5a0cb6f83a1f7d4
Allow loading mmx register from memory or general-purprose register (mmx_a2r)
Added SSE integer types
Added some new SSE2 instructions

diff -r 2ff5e6c512d9 -r a36c1bebf8fd src/xine-utils/xineutils.h
--- a/src/xine-utils/xineutils.h	Mon Apr 23 13:13:04 2007 +0300
+++ b/src/xine-utils/xineutils.h	Fri Apr 27 15:48:21 2007 +0300
@@ -156,11 +156,22 @@ typedef	union {
 			      : /* nothing */ \
 			      : "m" (mem))
 
+/* load dword from memory or gp register */
+#define	mmx_a2r(op,any,reg) \
+	__asm__ __volatile__ (#op " %0, %%" #reg \
+			      : /* nothing */ \
+			      : "g" (any))
+
 #define	mmx_r2m(op,reg,mem) \
 	__asm__ __volatile__ (#op " %%" #reg ", %0" \
 			      : "=m" (mem) \
 			      : /* nothing */ )
 
+#define	mmx_r2a(op,reg,any) \
+	__asm__ __volatile__ (#op " %%" #reg ", %0" \
+			      : "=g" (any) \
+			      : /* nothing */ )
+
 #define	mmx_r2r(op,regs,regd) \
 	__asm__ __volatile__ (#op " %" #regs ", %" #regd)
 
@@ -170,6 +181,8 @@ typedef	union {
 #define	movd_m2r(var,reg)	mmx_m2r (movd, var, reg)
 #define	movd_r2m(reg,var)	mmx_r2m (movd, reg, var)
 #define	movd_r2r(regs,regd)	mmx_r2r (movd, regs, regd)
+#define	movd_a2r(any,reg)	mmx_a2r (movd, any, reg)
+#define	movd_r2a(reg,any)	mmx_r2a (movd, reg, any)
 
 #define	movq_m2r(var,reg)	mmx_m2r (movq, var, reg)
 #define	movq_r2m(reg,var)	mmx_r2m (movq, reg, var)
@@ -364,6 +377,10 @@ typedef	union {
 
 typedef	union {
 	float			sf[4];	/* Single-precision (32-bit) value */
+	int64_t			q[2];	/* Quadword (64-bit) value */
+	uint64_t		uq[2];	/* Unsigned Quadword */
+	short			w[8];	/* 4 Word (16-bit) values */
+	unsigned short		uw[8];	/* 4 Unsigned Word */
 } ATTR_ALIGN(16) sse_t;	/* On a 16 byte (128-bit) boundary */
 
 
@@ -595,6 +612,22 @@ typedef	union {
 	__asm__ __volatile__ ("ldmxcsr %0" \
 			      : /* nothing */ \
 			      : "X" (mem))
+
+/* SSE2 */
+
+#define movdqa_m2r(var, reg)    mmx_m2r (movdqa, var, reg)
+#define movdqa_r2m(reg, var)    mmx_r2m (movdqa, reg, var)
+#define movdqa_r2r(regs, regd)  mmx_r2r (movdqa, regs, regd)
+
+#define movdqu_m2r(var, reg)    mmx_m2r (movdqu, var, reg)
+#define movdqu_r2m(reg, var)    mmx_r2m (movdqu, reg, var)
+
+#define pshufd_m2r(var, reg, imm)   mmx_m2ri (pshufd, var, reg, imm)
+#define pshufd_r2r(regs, regd, imm)   mmx_r2ri (pshufd, regs, regd, imm)
+
+#define pshuflw_m2r(var, reg, imm)  mmx_m2ri (pshuflw, var, reg, imm)
+#define pshuflw_r2r(regs, regd, imm)  mmx_r2ri (pshuflw, regs, regd, imm)
+
 #endif /*ARCH_X86 */